In a photoresist process as one of semiconductor manufacturing processes, resist is applied to the surface of a semiconductor wafer (hereinafter, referred to as a wafer), and then the resist is exposed and developed in a predetermined pattern to form a resist pattern. In a coating and developing apparatus for forming the resist pattern, a processing block including a processing module is provided for performing various processes with respect to a wafer.
The processing block is configured by stacking a unit block that forms various coating films such as a resist film and a unit block that performs development processing as disclosed, for example, in Japanese Patent Application Publication No. 2007-115831. A plurality of liquid processing modules applying a resist liquid or a development liquid, or a plurality of heating modules performing heating processing are inserted into the unit blocks.
In such a resist pattern forming apparatus, in order to improve the throughput, a plurality of unit blocks performing the same processing with respect to the wafer are provided and modules provided in the unit blocks are set as a multi-module in many cases. The multi-module refers to a plurality of modules that have the same transportation sequence and perform the same processing for the wafer. In addition, when the plurality of unit blocks performing the same processing are stacked, the wafers are provided to the unit blocks in sequence and processing is performed in each unit block, and thereafter, the wafers are carried out from each unit block according to the providing sequence, as disclosed in Japanese Patent Application Publication No. 2009-76893 (see, for example, claim 8).
In this case, the wafer is transported according to a previously prepared transportation schedule. Assuming that a place where the wafer is disposed is called a module, the transportation schedule is prepared by allocating the sequence to the wafers, and arranging transportation cycle data designating a transportation cycle in time series by making the sequence of the wafers and the sequence of the modules to correspond to each other.
However, in a unit block among the plurality of unit blocks performing the same processing, a module constituting the multi-modules may not sometimes be used due to a trouble or a maintenance. In this case, when a disabled module that cannot be used exists in a unit block, a throughput is deteriorated because an operation rate of the module decreases. However, in the configuration where the wafers are provided to the plurality of unit blocks in sequence and processed wafers are carried out according to the providing sequence from each unit block as described above, the throughput is deteriorated even in other unit blocks.
For example, when two unit blocks are provided, wafers W are alternatively provided to the unit blocks from a first wafer W1 of a lot in sequence. That is, for example, first wafer W1, a third wafer W3, a fifth wafer W5, and the like of the lot are provided in sequence to unit block of one side, and a second wafer W2, a fourth wafer W4, a sixth wafer W6, and the like of the lot are provided in sequence to the unit block of the other-side.
Herein, as a case in which n liquid processing modules are provided in each unit block, when the trouble occurs in one liquid processing module of the unit block of one-side, the operation rate of the liquid processing module of the one-side unit block becomes (n−1)/n.
In addition, in the unit block of the other-side, since wafers W are alternatively provided between the unit blocks of one-side, and the order of wafers W carried out from each unit block is determined, there is a standby status in which providing the wafers to the one-side unit block or carrying out the wafers from the one-side unit block must be waited. For example, when the trouble occurs in the liquid processing module before a seventh wafer W7 of the lot is transported to the unit block of one-side, wafer W7 cannot be transported to the liquid processing module in which the trouble occurs in the original transportation cycle, and as a result, for example, wafer W7 is transported to another liquid processing module in a next transportation cycle.
Therefore, an eighth wafer W8 of the lot is provided to the unit block of the other-side after waiting for providing of wafer W7. As a result, even though n liquid processing modules can be used in other liquid processing module, there occurs liquid processing modules that are not operated, such that the operation rate of the liquid processing module become (n−1)/n.
Accordingly, total 2n liquid processing modules are inserted into two unit blocks and even when the trouble occurs in one liquid processing module, the operation rate of all the liquid processing modules becomes (2n−2)/2n and the throughput of the entire apparatus is deteriorated. In this case, when the providing sequence of the wafers to the unit blocks or the carry-out sequence of the wafers are changed, transportation control becomes very difficult and it is not realistic.